$35 Billion Chip Deal Stuck: China Delays Synopsys-Ansys Amid Rising EDA Tensions

China delays the $35B Synopsys-Ansys merger amid U.S. export restrictions, putting the deal’s future at the mercy of geopolitics.

Introduction:

Imagine two global titans shaking hands to build a fortress of innovation—only to be stopped at the border by a rising wall of geopolitical tension. That’s exactly what’s happening to the $35 billion merger between Synopsys and Ansys, two of the most powerful players in the electronic design automation (EDA) market.

Despite green lights from the U.S. Federal Trade Commission (FTC) and the European Commission, China’s antitrust regulator has thrown a wrench in the deal’s timeline. And the reason? A new wave of U.S. export curbs on advanced EDA tools has unsettled the delicate tech equilibrium.

Quick Overview: What You Need to Know

China Delays Synopsys-Ansys Merger due to U.S. EDA export restrictions.

Deal worth $35 billion—one of the largest in EDA industry history.

U.S. bans EDA tools to China from late May 2025; licenses now required.

Deal deadline is Jan 15, 2026; risks collapse without Chinese approval.

Global EDA dominance at stake, with U.S. firms controlling 74% market share.

Background: Why the Deal Matters

Synopsys and Ansys want to merge strengths. Synopsys leads in chip design tools and IP. Ansys excels in simulation software for chips and systems. Together, they plan to build a software powerhouse that serves every stage of chip design, from transistor to final test.

This merger would reshape the global semiconductor software landscape. The combined company would offer end-to-end solutions to customers like NVIDIA, Intel, and TSMC. But it needs approval from all major markets—including China, which represents over 25% of global semiconductor demand.

U.S. EDA Curbs Disrupt China’s Review

On May 28, 2025, the U.S. imposed new rules. Now, Synopsys, Cadence, and Siemens must get licenses before selling EDA tools to China. These tools help design advanced 3nm and 5nm chips—key to powering AI, smartphones, and military hardware.

According to the Financial Times, China’s antitrust body—SAMR (State Administration for Market Regulation)—was in the final stage of reviewing the merger. But after the U.S. restrictions, the process stalled.

Timeline and Risk of Deal Collapse

The Synopsys-Ansys deal carries a “drop-dead” clause: If it doesn’t close by January 15, 2026, it gets automatically canceled. That gives both companies about 7 months to get China on board.

Synopsys CEO Sassine Ghazi remains hopeful. In a recent interview, he said the company continues to engage with Chinese regulators. But the road ahead is steep, especially if Washington doubles down on its tech control policies.

China May Demand Remedies

Beijing may approve the deal—but with conditions. Experts suggest China could ask Synopsys to:

  • Divest certain China-facing operations
  • Offer source code access or local partnerships
  • Promise supply continuity for Chinese chip firms

China wants to reduce foreign dependency in chip tools. Blocking this merger—or delaying it—buys time for domestic EDA startups like Empyrean Technology and Huada Empyrean to catch up.

Global EDA Market: A U.S.-Led Stronghold

Here’s a snapshot of the global EDA landscape in 2024, according to TrendForce:

CompanyMarket Share
Synopsys32%
Cadence29%
Siemens EDA13%
Others26%

Together, U.S. firms hold 74% of the EDA market. This dominance makes the industry a key target in Washington’s export control strategy.

Strategic Analogy: The Lock and Key of Chip Power

Think of chip design as a complex lock. The blueprint, simulation, and verification tools are the keys. Without them, no one can unlock the next generation of computing. Right now, America owns the keys. But China is building its own keyring—and trying to block any deal that might tighten U.S. control.

What’s Next: The Stakes Keep Rising

While trade talks between the U.S. and China continue, no sign suggests easing of EDA curbs. However, EE Times China reports that American firms have resumed selling some non-sensitive IP and hardware, signaling a crack in the wall.

Still, core chip design software remains restricted. As a result, the Synopsys-Ansys merger hangs in the balance—not because of market competition, but due to geopolitical strategy.

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Conclusion: A Race Against the Clock

This is more than a business deal—it’s a high-stakes tech standoff. With just months to close, Synopsys and Ansys must navigate the world’s most complicated regulatory maze. The final chapter may not be about who wins in software innovation—but who controls the global rules of semiconductor power.

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Kumar Priyadarshi
Kumar Priyadarshi

Kumar Joined IISER Pune after qualifying IIT-JEE in 2012. In his 5th year, he travelled to Singapore for his master’s thesis which yielded a Research Paper in ACS Nano. Kumar Joined Global Foundries as a process Engineer in Singapore working at 40 nm Process node. Working as a scientist at IIT Bombay as Senior Scientist, Kumar Led the team which built India’s 1st Memory Chip with Semiconductor Lab (SCL).

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