$773 Million Investment: Why Samsung Early High-NA EUV Adoption Could Shake Up the 2nm Chip Race

Samsung Early High-NA EUV Adoption could redefine the 2nm chip race — giving the Korean giant an edge over TSMC and Intel in AI and memory production.

Introduction

Samsung Foundry has officially entered the next frontier of chipmaking with a $773 million investment in two ASML High-NA EUV (Extreme Ultraviolet) lithography machines — the most advanced semiconductor manufacturing tools ever built.

This move positions Samsung Early High-NA EUV Adoption as a defining moment in the global semiconductor race. The company plans to deploy the technology at the 2nm node, ahead of rival TSMC, which will wait until its 1.4nm generation.

Samsung’s bold decision isn’t just about keeping up — it’s about taking the lead in the era of ultra-fine transistor geometries that power the world’s most advanced AI, data center, and mobile chips.

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Overview: Why This Investment Matters

  1. $773 million investment secures two of ASML’s ultra-rare EXE:5200B High-NA EUV tools.
  2. Early adoption at 2nm, compared to TSMC’s 1.4nm plan, could give Samsung a short-term production edge.
  3. Cross-technology integration — Samsung plans to use High-NA not just for logic, but also DRAM and HBM memory.
  4. Strategic lead in supply — with only 5–6 High-NA machines produced yearly, Samsung’s early booking ensures capacity.
  5. Broader industry impact — from AI servers to smartphones, Samsung Early High-NA EUV Adoption could reshape the global chip ecosystem.

What Makes High-NA EUV So Revolutionary?

Traditional EUV systems, used today for 3nm and 2nm chips, have a numerical aperture (NA) of 0.33. High-NA increases this to 0.55, drastically improving resolution and allowing chipmakers to create smaller, denser, and more energy-efficient transistors.

In practical terms, Samsung Early High-NA EUV Adoption means:

  • Fewer double patterning steps, reducing process complexity.
  • Improved yield and precision for 2nm-class transistors.
  • Enhanced power efficiency and speed for AI and mobile processors.

But this technology comes with challenges. Each High-NA EUV tool costs $380M–$500M and requires new resist materials, optics, and photo masks. Only ASML, based in the Netherlands, can manufacture them — making supply extremely limited.

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Samsung’s Plan: Logic and Memory Together

Samsung’s move stands out because it plans to use High-NA across both logic and memory — a combination no competitor is attempting yet.

1. 2nm Logic Chips

Samsung will first apply High-NA EUV to its SF2 (2nm-class) process, used for cutting-edge chips such as:

  • Exynos processors for mobile devices.
  • AI accelerators, including those built for Tesla’s Dojo platform.
  • High-performance custom chips for data centers.

2. Advanced Memory (DRAM and HBM)

At the same time, Samsung Early High-NA EUV Adoption will extend into DRAM and HBM production lines.
This is crucial because AI workloads demand both compute and memory bandwidth. High-NA will allow Samsung to produce:

  • Denser DRAM arrays with lower power consumption.
  • Faster HBM (High Bandwidth Memory) optimized for GPUs and AI servers.

By integrating High-NA into both domains, Samsung hopes to create a seamless synergy between processing and memory, offering vertically optimized AI hardware solutions.

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Competition: Intel and TSMC Take Different Paths

Intel: The First Mover

Intel received the world’s first High-NA EUV system in 2023, planning to use it for its 18A and 14A nodes. However, Intel’s High-NA integration is limited to internal use and R&D at this stage.

TSMC: The Calculated Wait

TSMC, on the other hand, is deliberately delaying High-NA until its 1.4nm (A14) process, expected around 2027.
Its reasons are strategic:

  • Minimize risk for key clients like Apple, AMD, and NVIDIA.
  • Maximize ROI from existing EUV infrastructure.
  • Maintain its reputation as the most reliable foundry in the industry.

While Samsung and Intel race forward, TSMC is focusing on scalability and stability.

A Korean High-NA Arms Race

Samsung’s announcement also coincides with SK Hynix ordering one EXE:5200B system for its HBM and DRAM manufacturing lines.

This signals a broader Korean High-NA arms race, with both Samsung and Hynix aiming to lead the world in next-generation lithography and memory innovation.

For South Korea, Samsung Early High-NA EUV Adoption is not just corporate strategy — it’s national strategy. It strengthens Korea’s position as a global semiconductor powerhouse, reducing dependence on foreign foundries.

techovedas.com/intel-to-make-history-on-asmls-exe5200b-high-na-euv-ushers-in-the-next-era-of-chipmaking

Global Impact and Geopolitics

High-NA EUV is tightly controlled under U.S. and Dutch export regulations, meaning Chinese fabs cannot access this technology.

As a result:

  • China remains capped at 5nm–7nm nodes.
  • Korea, Taiwan, and the U.S. continue advancing toward 2nm and below.
  • The tech gap between China and the rest of the semiconductor world widens.

For Samsung, this geopolitical context magnifies the importance of its investment. Samsung Early High-NA EUV Adoption positions it as a key player in the Western-aligned semiconductor supply chain, ensuring its leadership in a highly restricted, high-value domain.

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Challenges Ahead

Despite the potential advantages, Samsung faces tough hurdles:

  • Yield management: High-NA introduces new process variables that can hurt early yields.
  • Cost pressure: The total integration cost, including fab upgrades, may exceed $1 billion.
  • Tool utilization: With only two High-NA tools initially, balancing R&D and production will be tricky.
  • Competition: TSMC’s maturity and Intel’s process control expertise remain formidable barriers.

Samsung’s early move must therefore deliver not just innovation — but profitable scalability.

techovedas.com/how-chinas-game-changing-euv-breakthrough-is-a-challenge-to-asml-dominance

The Bigger Picture: A Shift in Industry Power

The semiconductor industry is entering a new era defined by High-NA EUV scalability.

For years, the race was about who gets the next node first. Now, it’s about who can produce it efficiently.
Samsung’s early adoption could give it a temporary lead, but long-term leadership depends on production yields, client trust, and cost management.

If Samsung Early High-NA EUV Adoption succeeds, it could reset the competitive balance between TSMC, Intel, and Samsung — restoring the Korean giant’s lost edge in the foundry market.

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Conclusion

Samsung’s $773 million investment in ASML’s High-NA EUV machines marks a turning point in the 2nm chip race.

By embracing the technology earlier than any rival foundry, Samsung Early High-NA EUV Adoption positions the company as both a technology pioneer and a strategic leader.

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Kumar Priyadarshi
Kumar Priyadarshi

Kumar Joined IISER Pune after qualifying IIT-JEE in 2012. In his 5th year, he travelled to Singapore for his master’s thesis which yielded a Research Paper in ACS Nano. Kumar Joined Global Foundries as a process Engineer in Singapore working at 40 nm Process node. Working as a scientist at IIT Bombay as Senior Scientist, Kumar Led the team which built India’s 1st Memory Chip with Semiconductor Lab (SCL).

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