Aryabhat - I ; India’s very own Analog AI processor for Edge applications

Introduction

Artificial intelligence (AI) has taken the world on fire and India is no behind. Researchers at the NeuRONICs lab of Indian Institute of Science Bangalore have embarked on a transformative journey with the development of Aryabhat – I, a groundbreaking analog AI processor designed for edge computing applications.

Professor Chetan Singh Thakur and his team spearhead this ambitious endeavor, striving to overcome challenges in high-performance analog computing and provide a scalable solution for Edge computation.

What is Aryabhat processor?

ARYABHAT Analog Reconfigurable technology And Bias-scalable Hardware for AI Tasks, is a next-generation analog computing chipset designed to target Artificial-Intelligence (AI) and Machine Learning (ML) applications at the edge.

Currently, we are developing a groundbreaking technology—a scalable, reconfigurable analog processor that represents the first of its kind. Additionally,this processor can be fully scaled down to sub-nanometer process nodes.

Unlike general-purpose platforms, it utilizes application-specific digital accelerators, employing spatial arrays of parallel processing elements. This innovative approach enhances both performance and energy efficiency in machine learning computations.

A Visionary Genesis

The genesis of Aryabhat lies in a visionary goal – to conceptualize, build, and prototype a unique analog processor that could revolutionize the way edge computing functions in India. The primary objective is clear: create a processor that is not only technology, energy, and performance scalable but also addresses a fundamental challenge in high-performance analog compute system design i.e. bias dependency.

Aryabhat Chip Architecture

Aryabhat’s architecture is a testament to innovation. It is fully reconfigurable and programmable, allowing users to adapt to various technology nodes without compromising functionality.

Additionally,this feature, combined with the processor’s flexibility in selecting energy and performance parameters, makes Aryabhat a versatile solution for a spectrum of AI, ML, and energy-efficient applications.

How does the chip overcome bias dependency?

The Aryabhat processor maintains stable operation despite varying power supply conditions through its “bias-scalable” architecture.

The processor maintains consistent performance even when modifying operating conditions such as voltage or current.

Achieving this is through an approximate analog computing framework based on Margin Propagation (MP), enabling the chip to balance speed and energy efficiency, while remaining robust to temperature variations. Moreover,the chip’s architecture is designed to operate seamlessly in various regimes, including weak, moderate, and strong inversion, without sacrificing functionality.

This is a significant advantage in analog compute system design, where performance can often be sensitive to these kinds of variations. Also, this makes Aryabhat processor robust and reliable, capable of functioning effectively across a wide range of power supply conditions.

Additionally,this feature greatly benefits applications requiring high-speed operations or ultra-energy-efficient Internet of Things (IoT) applications, enabling the configuration of the same chipset for different applications without compromising performance.

From Transistors to Systems

The design and development of Aryabhat traverse the intricate landscape from the transistor level to the system level.Additionally, this custom-built processor is engineered to seamlessly operate across different technology nodes. The current prototype boasts eight high-performance computational cores, with plans to extend its capabilities in future releases.

A complete system stack

The ARYABHAT processor boasts a complete system stack, including an algorithm mapping tool (ARYAFlow) and an analog testing framework (ARYA Test), forming a comprehensive computing ecosystem. Moreover,this ecosystem enables seamless programming and testing of the processor, ensuring optimal performance and efficiency.

The ARYABHAT processor actively supports a broad spectrum of machine learning algorithms, optimizing energy consumption and computational efficiency, including Fully-Connected and Convolutional Neural Networks.

Its architecture offers flexibility in implementing different dataflow methods and optimizations, making it suitable for diverse machine learning computations.

Looking ahead, ARYABHAT plans to expand resources, enhance interconnect bandwidth, and upgrade the mapper to support an even broader range of machine learning algorithms. This will further enhance the processor’s scalability and performance, making it an ideal choice for edge AI applications.

Stellar Performance Results

Aryabhat’s computational cores exhibit remarkable responses, particularly in their sensitivity to nanoamp variations in current. What sets this processor apart is its ability to operate in an energy-efficient mode, consuming mere micro-watts, or seamlessly switch to high-performance mode, operating in the milliwatt power range based on the specific application’s requirements.

Conclusion

Aryabhat isn’t just a processor; it’s a testament to India’s capacity for innovation and contribution to the global AI and ML landscape. Also, it is an indicator that the analog compute era is returning. After a 20-year saga of digital ASICs, analog chips are again looked after. Reasons? Power efficiency and speed through in-memory compute.
In a world where edge computing in IoT devices is gaining prominence, analog processors like Aryabhat stand ready to address the challenges of efficiency, scalability and in meeting the compute demands of AI and ML at the edge. As the project progresses, Aryabhat is set to be an inspiration to all analog processors ahead.