In a groundbreaking development, ASML has announced the shipment of its pilot High-NA EUV scanner, the Twinscan EXE:5000, to Intel. This milestone marks a significant advancement in semiconductor manufacturing technology, with implications not only for Intel but also for the broader industry.
The High-NA EUV scanner is poised to revolutionize chip production, offering enhanced resolution and paving the way for cutting-edge process technologies beyond 3nm.
In this blog post, we will delve into the key details of this announcement and its potential impact on the semiconductor landscape.
What is Special about Twinscan EXE High-NA Scanner:
The ASML Twinscan EXE High-NA Scanner is special and represents a significant leap in semiconductor lithography technology, particularly when compared to existing technologies. Here are some key aspects that set the High-NA scanner apart from its predecessors:
Numerical Aperture (NA):
The High-NA scanner features a numerical aperture of 0.55. Numerical aperture is a crucial parameter in lithography, determining the system’s ability to resolve fine details. A higher NA allows for higher resolution, and in this case, the 0.55 NA is a notable improvement over existing EUV scanners with lower NAs.
With an 8nm resolution, the High-NA scanner surpasses the capabilities of current EUV tools, which typically have a resolution around 13nm. This improvement is vital for producing more advanced semiconductor devices with smaller feature sizes, contributing to increased performance and efficiency.
The High-NA scanner is part of the next generation of extreme ultraviolet (EUV) lithography tools. EUV lithography is already a cutting-edge technology, but the High-NA variant takes it further by offering enhanced capabilities. The tool is expected to be crucial for chip production using process technologies beyond 3nm to be adopted by 2025-26.
Reduction in Complexity:
High-NA EUV scanners allow fabs to achieve higher resolution without resorting to EUV double patterning. This reduction in complexity is significant as it simplifies the manufacturing process, potentially leading to improved yields and lower costs.
The High-NA scanners introduce changes in various aspects, such as the halved reticle size. This requires chipmakers to adapt their design and production processes. Additionally, new photoresists, metrology tools, pellicle materials, masks, and inspection tools are needed, reflecting the comprehensive nature of the technological shift.
Intel Role in Advancing Semiconductor Technology with ASML:
Intel, an early adopter of ASML’s High-NA technology, placed an order for the pilot scanner in 2018. The company is set to use the Twinscan EXE:5000 for experimentation before deploying the commercial-grade Twinscan EXE:5200 tool for high-volume manufacturing (HVM) in 2025.
Intel’s proactive approach positions it at the forefront of High-NA manufacturing, allowing the company to set industry standards and potentially gain a competitive advantage over rivals such as Samsung Foundry and TSMC.
Logistics and Infrastructure Challenges:
Transporting the High-NA EUV scanner from ASML’s facility in Veldhoven, Netherlands, to Intel’s facility near Hillsboro, Oregon, is no small feat. The colossal machine requires 13 truck-sized containers and 250 crates for transportation.
Once assembled, the scanner stands at an impressive three stories tall, necessitating the construction of a new, taller fab expansion by Intel to accommodate it. The investment in infrastructure is substantial, reflecting the industry’s commitment to staying at the forefront of technological advancements.
ASML’s plan to manufacture 20 High-NA EUV lithography tools annually by 2027-2028 indicates widespread industry adoption of this transformative technology. Intel’s early acquisition of High-NA tools positions the company to set industry standards and gain a competitive advantage.
The collaboration between ASML and Intel is a pivotal moment shaping the future of chip manufacturing, with implications extending beyond Intel’s facilities as the semiconductor landscape evolves.