CPO Surge: How TSMC & MediaTek Are Powering the Future of 5G and AI Chips

TSMC and MediaTek lead Taiwan’s CPO and SerDes revolution, powering next-gen 5G and AI chips with cutting-edge optical and silicon photonic integration.

Introduction:

The future of chips isn’t just about shrinking transistors—it’s about how fast they talk to each other. As AI workloads explode and 5G networks go mainstream, the industry is hitting a wall with traditional copper-based interconnects. Enter Co-Packaged Optics (CPO)—a breakthrough solution that eliminates bottlenecks in data transmission by integrating photonics directly into the chip package.

Taiwan’s tech heavyweights—TSMC and MediaTek—are making bold moves to lead this revolution. Backed by years of silicon leadership and deep system integration expertise, they are not just chasing trends—they’re setting them.

/techovedas.com/tsmc-develops-silicon-photonics-technology-to-address-gpu-overheating-and-bandwidth-challenges/

Key Takeaways

TSMC’s photonic packaging expertise makes it the global foundry of choice for CPO chips.

MediaTek is building custom optical-electrical chip platforms for hyperscale AI and 5G infrastructure.

Realtek is scaling SerDes to 224Gbps, preparing for enterprise-level CPO demands.

Qualcomm’s $2.4B Alphawave buyout ignites a global SerDes arms race.

Taiwan is building a full-stack CPO ecosystem that spans from SerDes to packaging.

What Is Co-Packaged Optics (CPO) and Why It Matters

In traditional systems, electrical signals travel across circuit boards and copper wires—fast, but not fast enough for modern AI and 5G.

CPO changes the game by embedding lasers, modulators, and photodetectors inside the same package as switching chips. This eliminates signal degradation, reduces power draw, and boosts bandwidth.

To make this work, CPO relies on SerDes (Serializer/Deserializer) circuits. These high-speed interfaces turn wide data into lightning-fast serial streams and back—critical for massive data movement between chips.

Synopsys reports that next-gen SerDes IP supports standards like PCIe, Ethernet, USB, and MIPI—vital for hyperscale data centers and cloud SoCs.

https://www.ansys.com/blog/what-is-co-packaged-optics

MediaTek: Custom CPO for AI and Telcos

As Taiwan’s top IC design firm, MediaTek is at the cutting edge of heterogeneous integration. The company is building bespoke CPO solutions for AI data centers that fuse SerDes and photonics into a single package.

techovedas.com/what-is-heterogeneous-integration-advantages-types-and-technology

Cooling + Materials = Optical Stability

One major hurdle in CPO is heat. High-speed data and light generate thermal stress, which can distort signals. MediaTek is developing advanced cooling systems and materials that ensure temperature stability at terabit speeds.

Roadmap: From 112G to 448G

MediaTek and its affiliate Airoha are on track to scale SerDes performance from 112Gbps to 448Gbps by 2028. Their 112Gbps PAM4 SerDes IP has been validated and will enter mass production in 2026.

This roadmap supports the bandwidth demands of future AI accelerators, telco base stations, and edge compute nodes.

techovedas.com/mediatek-unveils-dimensity-8400-soc-a-powerful-competitor-in-the-upper-midrange-smartphone-market/

Qualcomm Joins the Race with $2.4B Bet

In June 2025, Qualcomm acquired Alphawave IP for $2.4 billion—a move that signals the growing strategic importance of SerDes technology.

This acquisition provides Qualcomm with best-in-class high-speed SerDes IP and tightens its competitive grip on the AI infrastructure and networking market, directly challenging MediaTek.

techovedas.com/qualcomm-alphawave-the-silent-alliance-that-could-reshape-ai-data-centers

Realtek’s High-Speed Push

Realtek is quietly building 224Gbps PAM4 SerDes cores for cloud switches, enterprise networks, and data-intensive AI systems.

Unlike MediaTek, Realtek doesn’t manufacture photonic devices, so it’s teaming up with third-party optical component makers. This collaboration model enables rapid scaling while keeping R&D lean.

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TSMC: The Silent Backbone of Photonic Manufacturing

TSMC, the world’s top foundry, is enabling the global shift to photonics and CPO with its unmatched 2.5D and 3D advanced packaging capabilities.

Photonic ICs don’t need the latest nodes (like 2nm), but they require ultra-precise waveguide alignment, silicon photonic integration, and novel substrates—areas where TSMC excels.

Precision Matters: Tackling Fiber Alignment

One of the most challenging aspects of CPO is aligning fibers (100 microns) with waveguides (a few microns). According to Commercial Times, TSMC is investing in AI-guided alignment systems to ensure perfect coupling, boosting reliability and yield.

Taiwan’s Full-Stack CPO Ecosystem

Here’s how Taiwan’s semiconductor ecosystem is coming together to lead the optical revolution:

SegmentPlayersFocus Areas
SerDes IPMediaTek, Realtek112G–448G PAM4 SerDes for AI and 5G
Optical PackagingTSMC, ASE GroupAdvanced fiber alignment, thermal management
System IntegrationMediaTek, AirohaHeterogeneous integration, full-stack CPO
Substrate & MaterialsUnimicron, NanyaHigh-speed substrates, thermal conductivity
Photonic ComponentsEpistar, WaveFrontModulators, lasers, photodetectors

Taiwan is the only country currently offering design-to-manufacture capabilities for SerDes and CPO in one place.

AI, Cloud & 5G: The Markets That Need CPO Now

AI Workloads

From large language models to autonomous vehicles, modern AI requires terabit-level interconnects. CPO slashes the latency between GPUs, CPUs, and AI accelerators.

Cloud Hyperscalers

Data centers from AWS, Azure, and Google Cloud need high-bandwidth, low-power communication between racks. CPO reduces energy use and boosts throughput.

5G + Edge

5G base stations and MEC nodes need compact, fast, and cool interconnects. CPO provides the right mix of performance and efficiency.

What’s Next: The Road to 2030

  • 2026: Mass production of 112Gbps SerDes by MediaTek and Airoha
  • 2028: First commercial deployment of 448G CPO systems
  • 2030: Full adoption of CPO across hyperscale cloud, defense, and telecom networks

Conclusion: Taiwan’s CPO Playbook Is Redefining Chip Innovation

In the post-Moore’s Law era, speed is no longer about smaller transistors—it’s about smarter interconnects.

Thanks to pioneers like TSMC and MediaTek, Taiwan is spearheading a silicon-photonic revolution that will power the next decade of AI, 5G, and cloud computing. Their CPO strategies aren’t just future-proof—they’re future-defining.

If you want to understand where high-performance computing is headed, follow the light—and follow Taiwan.

Kumar Priyadarshi
Kumar Priyadarshi

Kumar Joined IISER Pune after qualifying IIT-JEE in 2012. In his 5th year, he travelled to Singapore for his master’s thesis which yielded a Research Paper in ACS Nano. Kumar Joined Global Foundries as a process Engineer in Singapore working at 40 nm Process node. Working as a scientist at IIT Bombay as Senior Scientist, Kumar Led the team which built India’s 1st Memory Chip with Semiconductor Lab (SCL).

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