Democratizing Advanced Packaging: Intel Foundry Partners with EDA Leaders on EMIB Design

Intel Foundry's latest announcement showcases collaborative efforts with industry leaders Ansys, Cadence, Siemens, and Synopsys to provide reference workflows for advanced packaging technology, driving innovation in semiconductor design.

Introduction:

Intel Foundry recent announcement of reference workflows from key partners Ansys, Cadence, Siemens, and Synopsys for its embedded multi-die interconnect bridge (EMIB) advanced packaging technology signifies a significant advancement in the semiconductor industry. This collaborative effort aims to streamline the design process and provide customers with optimized solutions for system-on-chip designs.

Focus on Advanced Packaging Technology:

The reference workflows announced are specifically designed for Intel’s EMIB (embedded multi-die interconnect bridge) technology. EMIB is an innovative chiplet packaging solution that allows for close integration of multiple dies in a single package, enhancing performance and functionality.

Collaboration with EDA Leaders:

This initiative involves collaboration with four key players in the Electronic Design Automation (EDA) space: Ansys, Cadence, Siemens, and Synopsys. These companies are major providers of software tools essential for chip design and verification.

Benefits for Foundry Customers:

The reference workflows provide a standardized approach for utilizing Intel’s EMIB technology within the design environment of these EDA tools. This translates to benefits for foundry customers in several ways:

  • Streamlined Design Process: Reference workflows offer a well-defined path for integrating EMIB into chip designs, saving time and resources during the design phase.
  • Reduced Risk: Standardized workflows help mitigate potential errors and ensure design compliance with Intel’s specifications.
  • Increased Efficiency: By leveraging established tools and methodologies, designers can focus on innovation rather than grappling with the intricacies of new packaging technologies.

Ecosystem Building Approach:

This collaboration highlights Intel Foundry’s commitment to fostering a strong design ecosystem. By providing these resources, they are creating a more favorable environment for fabless chip companies (those that design chips but outsource fabrication) to adopt their foundry services.

Overall, this announcement underscores Intel Foundry’s strategic push to establish itself as a leading player in the foundry market by providing advanced technologies along with the design tools and support necessary for customer success.

In this blog post, we’ll explore the background of Intel Foundry’s partnership with leading EDA and IP providers, delve into the intricacies of EMIB technology, and examine the implications for the semiconductor landscape.

Follow us on Linkedin for everything around Semiconductors & AI

Background:

Intel Foundry has been steadily expanding its design ecosystem through strategic partnerships with industry leaders in electronic design automation (EDA) and intellectual property (IP).

These collaborations aim to provide customers with comprehensive solutions for semiconductor design, fabrication, and assembly.

Ansys, Cadence, Siemens, and Synopsys are among the key partners that have been working closely with Intel Foundry to develop reference workflows and enablement tools for emerging technologies such as EMIB.

Read More: Top 5 New design Tools and Software Transforming Semiconductor Design in 2024 – techovedas

EMIB Technology and its Benefits:

Embedded multi-die interconnect bridge (EMIB) technology is a breakthrough in semiconductor packaging, allowing the integration of multiple dies in a single package.

EMIB offers high bandwidth and low latency, simplifying the design process and providing flexibility in system-on-chip (SoC) designs.

It is ideal for heterogeneous architectures, enabling cost-effective scaling to larger silicon areas.

EMIB technology meets the performance demands of AI accelerators and high-performance computing applications.

Read More: From Light Switches to Laptops: How logic Gates Define the World of Digital VLSI Design? – techovedas

New Developments and Partner Announcements:

The recent announcement from Intel Foundry and its ecosystem partners emphasizes the availability of reference workflows and enablement tools for EMIB technology.

Ansys is collaborating with Intel Foundry to deliver signoff verification for thermal and power integrity.

Cadence offers a complete EMIB packaging flow and design IP to support Intel Foundry’s customers.

Siemens has introduced an EMIB reference flow for Intel Foundry’s customers.
Siemens also announced Solido Simulation Suite certification for custom IC verification on Intel nodes.

Synopsys, meanwhile, provides an AI-driven multi-die reference flow, accelerating the development of multi-die designs.

Read More: 6 Step Roadmap to a Career in VLSI Design

Implications for the Semiconductor Industry:

The availability of reference workflows and collaborative efforts between Intel Foundry and its ecosystem partners are significant for the semiconductor industry. Intel Foundry’s goal is to streamline the design process and provide access to cutting-edge technologies. The aim is to drive innovation and accelerate time-to-market for next-generation silicon products.

The adoption of EMIB technology by leading EDA and IP providers highlights its importance in enabling advanced packaging solutions. EMIB technology plays a crucial role in AI accelerators, high-performance GPUs, and other graphics-intensive applications.

Conclusion:

Intel Foundry’s announcement signifies a significant milestone in semiconductor design advancement. Collaborative partnerships with Ansys, Cadence, Siemens, and Synopsys are driving technological innovation.

Intel Foundry aims to shape the future of the semiconductor industry and accelerate progress in AI computing and high-performance computing. The focus on heterogeneous architectures aligns with industry trends and emerging opportunities in the AI era. The collaboration between Intel Foundry and its ecosystem partners will play a crucial role in driving industry-wide advancements.

Kumar Priyadarshi
Kumar Priyadarshi

Kumar Joined IISER Pune after qualifying IIT-JEE in 2012. In his 5th year, he travelled to Singapore for his master’s thesis which yielded a Research Paper in ACS Nano. Kumar Joined Global Foundries as a process Engineer in Singapore working at 40 nm Process node. Working as a scientist at IIT Bombay as Senior Scientist, Kumar Led the team which built India’s 1st Memory Chip with Semiconductor Lab (SCL).

Articles: 2566