5 Groundbreaking Semiconductor Advancements at IEDM 2024 by Intel

Intel Foundry reveals groundbreaking advancements at IEDM 2024, including new innovations in transistor technology

Introduction

At the IEEE IEDM (International Electron Devices Meeting)2024Intel Foundry made significant strides in semiconductor technology, showcasing industry-first innovations in transistor and packaging technologies. These advancements are set to revolutionize the semiconductor industry and meet the growing demands of applications like artificial intelligence (AI) in the coming decades.

Key Highlights of Intel Foundry’s Innovations:

  1. Subtractive Ruthenium for Improved Chip Interconnections
  2. Selective Layer Transfer (SLT) for Ultra-Fast Chip Assembly
  3. Silicon RibbonFET CMOS for Gate-All-Around Scaling
  4. Breakthrough in 2D FETs and Gate Oxide for Enhanced Transistor Performance
  5. Gallium Nitride Technology for Power and RF Electronics

IEDM2024

At IEDM 2024, Intel Foundry revealed cutting-edge advancements in semiconductor technology, addressing the increasing demand for energy-efficient, high-performing, and cost-effective solutions in fields like AI. The company presented breakthroughs in interconnect materials, advanced packaging solutions, and transistor scaling, all of which are critical for the future of the semiconductor industry. These developments are poised to contribute to the continued scaling of Moore’s Law and ensure the availability of faster, more powerful chips in the years to come.

Intel Foundry’s Role in Shaping the Future of Semiconductors

Intel Foundry is playing a pivotal role in defining the semiconductor industry’s roadmap. With the goal of enabling the production of chips containing 1 trillion transistors by 2030, Intel’s latest innovations are designed to overcome the limitations of existing technologies. As the industry faces rising demands for higher processing power, faster speeds, and more efficient energy consumption, Intel’s advancements offer promising solutions for future AI applications and beyond.

Sanjay Natarajan, Senior Vice President and General Manager of Intel Foundry Technology Research, emphasized the company’s commitment to developing cutting-edge technologies in the U.S. This commitment aligns with the objectives of the U.S. CHIPS Act, which aims to strengthen domestic manufacturing and restore technological leadership.

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Subtractive Ruthenium for Enhanced Chip Performance

One of Intel’s most notable innovations at IEDM 2024 is the use of subtractive ruthenium (Ru) as a key alternative to copper in chip interconnects. The introduction of this new material addresses one of the significant challenges in semiconductor scaling: the limitations of copper in handling higher performance levels.

Intel’s subtractive Ru process integrates airgaps in the interconnects, reducing line-to-line capacitance by up to 25% in chips with pitches of 25 nanometers or less. This breakthrough enables more efficient and cost-effective interconnections, paving the way for the next generation of semiconductor manufacturing. The technology also eliminates the need for costly and complex lithographic airgap exclusion zones, making it compatible with high-volume manufacturing.

Selective Layer Transfer (SLT) for Ultra-Fast Chip Assembly

In another industry-first, Intel Foundry introduced Selective Layer Transfer (SLT), a heterogeneous integration solution that enables ultra-fast chip-to-chip assembly. This technology is designed to enhance the performance and efficiency of advanced packaging techniques.

SLT offers a significant throughput improvement, providing up to 100 times faster chip-to-chip assembly compared to traditional methods. It enables the creation of ultra-thin chiplets with more flexibility. Smaller die sizes and higher aspect ratios become achievable. This is especially useful for AI applications. Demand for higher functional density and cost-effective solutions is growing. SLT allows faster and more flexible chip assembly. It marks a major leap in advanced packaging. Diverse chiplets can integrate into a single, efficient package.

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Silicon RibbonFET CMOS: Pushing the Limits of Gate-All-Around Scaling

Intel also demonstrated its continued progress in transistor scaling with Silicon RibbonFET CMOS technology. This advancement is a critical step toward the future of gate-all-around (GAA) transistor architectures.

RibbonFET technology is at the forefront of transistor scaling, offering significant improvements in short channel effects and overall performance. At IEDM 2024, Intel showcased RibbonFET CMOS transistors with a gate length of 6 nanometers.

This achievement boosts transistor performance significantly. It also prepares for further scaling with even smaller gate lengths. RibbonFET will play a key role in advancing Moore’s Law. It enables faster and more efficient chips for next-gen computing.

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Gate Oxide and 2D FETs: Driving Innovation

Intel is advancing gate oxide (GOx) technology for 2D FETs. These developments accelerate gate-all-around (GAA) scaling. Research focuses on 2D transition metal dichalcogenides (TMDs). These materials may replace silicon in advanced transistors.

2D FETs overcome limitations of silicon-based transistors. Gate lengths are scaled down to 30 nanometers. This delivers significant performance improvements. It enables faster, more efficient devices. Intel’s research supports the trillion-transistor era. Demand for powerful, energy-efficient chips continues to grow.

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Gallium Nitride (GaN) Technology for Power and RF Electronics

Another major breakthrough unveiled by Intel Foundry is its 300 millimeter gallium nitride (GaN) technology. GaN is an emerging material that offers superior performance compared to silicon, especially in power and radio frequency (RF) electronics.

Intel’s GaN-on-TRSOI (trap-rich silicon-on-insulator) substrate technology delivers improved performance, particularly in applications that require higher voltages and temperatures. This innovation could lead to more efficient power conversion and improved signal integrity in RF applications, offering significant potential for use in next-generation communications and power systems.

Looking to the Future: AI, Advanced Packaging, and Beyond

Intel Foundry’s presentation at IEDM 2024 also outlined the company’s vision for the future of semiconductor technology. The company emphasized three key areas of innovation that will be crucial for meeting the demands of AI and other high-performance computing applications:

  1. Advanced Memory Integration: To overcome capacity, bandwidth, and latency limitations.
  2. Hybrid Bonding: For optimizing interconnect bandwidth.
  3. Modular System Expansion: With enhanced connectivity solutions.

Intel also called for continued research into ultra-low voltage transistors, which could significantly reduce thermal bottlenecks and improve energy efficiency.

The company’s ongoing efforts to push the boundaries of semiconductor technology are set to play a critical role in shaping the future of AI, data centers, and a wide range of other applications.

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Conclusion

Intel Foundry’s advancements presented at IEDM 2024 are a testament to the company’s leadership in the semiconductor industry. From revolutionary interconnect materials like subtractive ruthenium to groundbreaking transistor scaling technologies like Silicon RibbonFET and 2D FETs, Intel is positioning itself at the forefront of the trillion-transistor era. These innovations are crucial for meeting the future demands of AI and other high-performance applications, ensuring the continued evolution of semiconductor technology in the decades to come.

Kumar Priyadarshi
Kumar Priyadarshi

Kumar Joined IISER Pune after qualifying IIT-JEE in 2012. In his 5th year, he travelled to Singapore for his master’s thesis which yielded a Research Paper in ACS Nano. Kumar Joined Global Foundries as a process Engineer in Singapore working at 40 nm Process node. Working as a scientist at IIT Bombay as Senior Scientist, Kumar Led the team which built India’s 1st Memory Chip with Semiconductor Lab (SCL).

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