Samsung to Provide Turnkey Solutions with 2nm GAA and 2.5D Package to Preferred Networks

Samsung Electronics' collaboration with Preferred Networks to deliver advanced semiconductor solutions using the 2nm GAA process and 2.5D packaging technology

Introduction

Samsung Electronics, a global leader in semiconductor technology, has announced a groundbreaking collaboration with Preferred Networks, a prominent Japanese AI company. This partnership will see Samsung electronics providing turnkey semiconductor solutions using its cutting-edge 2nm GAA foundry process and advanced 2.5D packaging technology, known as Interposer-Cube S (I-Cube S).

2nm GAA process: This refers to the size and design of the transistors on the chip. 2nm refers to the size of the gate (a key part of the transistor), which is incredibly tiny and allows for more transistors to be packed onto a chip, boosting performance. GAA stands for Gate-All-Around, which is a new transistor design that improves efficiency over previous designs.

2.5D packaging: This refers to how the chips are physically assembled. Traditionally, chips are stacked on top of each other. In 2.5D packaging, chips are placed side-by-side on a special platform called an interposer, which allows for shorter distances between chips and faster communication.

This collaboration aims to develop powerful AI accelerator chips to meet the burgeoning demand for computing power driven by generative AI.

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Deep Dive into Samsung 2nm GAA and 2.5D Package for Preferred Networks

Benefits of 2nm GAA Process:

  • Increased Performance: Smaller transistors allow for more to fit on a chip, leading to significant performance gains. This translates to faster processing of complex AI tasks.
  • Improved Power Efficiency: The GAA design reduces power leakage compared to traditional transistor designs. This allows for more processing power without a corresponding increase in power consumption, making it ideal for battery-powered devices or large data centers.
  • Samsung’s Lead: Samsung is the first company to mass produce chips using the 3nm GAA process, giving them a head start in this cutting-edge technology.

Advantages of 2.5D Packaging with Interposer-Cube S (I-Cube S):

  • Faster Communication: By placing chips side-by-side on an interposer, the distance between them is minimized. This allows for faster data transfer between different parts of the AI chip, leading to improved overall performance.
  • Reduced Package Size: 2.5D packaging allows for more efficient use of space compared to traditional stacking methods. This is crucial for cramming more processing power into smaller devices.
  • Heterogeneous Integration: I-Cube S allows for the integration of various chips, like memory and processing units, in a single package. This creates a more optimized system for specific tasks like AI processing.

Impact on AI Development:

  • Powerful AI Accelerators: The combination of 2nm GAA and 2.5D packaging is expected to produce highly efficient AI accelerators. These chips will be ideal for running complex AI models, particularly those used in generative AI, which require massive amounts of processing power .
  • Advancements in Generative AI: Generative AI applications like large language models (like me!) and image/video generation will benefit greatly from the increased processing power and efficiency offered by these new chips.

Market Implications:

  • Samsung’s Leadership: By securing this order, Samsung solidifies its position as a leader in advanced chip manufacturing, particularly for the AI market [2].
  • Future of Chip Design: This collaboration paves the way for wider adoption of 2nm GAA and 2.5D packaging technologies, potentially impacting future generations of chips across various industries.

Overall, this partnership between Samsung and Preferred Networks represents a significant leap forward in AI chip development. The combination of these cutting-edge technologies promises to bring faster, more efficient, and more powerful AI solutions to the future.

The Significance of the Collaboration for Samsung 2nm GAA Process

Advanced Semiconductor Technology

Samsung’s 2nm process technology represents a significant leap forward in semiconductor manufacturing.

Since pioneering the industry’s first 3nm process node with Gate-All-Around (GAA) transistor architecture, Samsung electronics has continued to enhance its 2nm GAA technology.

The 2nm process offers further improvements in performance and power efficiency, positioning Samsung at the forefront of semiconductor innovation.

Preferred Networks’ Role in AI

Preferred Networks, headquartered in Tokyo, is a key player in the global AI market. The company specializes in developing advanced software and hardware technologies, vertically integrating the AI value chain from chips to supercomputers and generative AI foundation models.

Preferred Networks provides solutions across various industries, including manufacturing, transportation, healthcare, entertainment, and education.

The company has consistently ranked high on the Green500 list of supercomputers, achieving first place three times in the past five years.

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Turnkey Semiconductor Solutions

2nm GAA Process

The 2nm GAA process technology is a cornerstone of this collaboration. GAA technology offers significant advantages over traditional FinFET architectures, including enhanced performance and reduced power consumption.

By leveraging this advanced process, Preferred Networks aims to develop AI accelerators that deliver unprecedented levels of energy efficiency and computational power, crucial for handling the demands of generative AI technologies and large language models.

2.5D Packaging with I-Cube S

The 2.5D packaging technology, I-Cube S, is another critical component of Samsung’s turnkey solutions. This heterogeneous integration package technology combines multiple chips into a single package, enhancing inter-connection speed and reducing package size.

The use of a silicon interposer (Si-interposer) allows for ultra-fine redistribution layers (RDL) and stabilizes power integrity, optimizing semiconductor performance.

GAONCHIPS, a specialized system semiconductor development company, plays a key role in this partnership by designing the AI accelerator chip. Their expertise ensures that the chip meets the high-performance and low-power requirements essential for cutting-edge AI applications.

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Impact on AI and Semiconductor Industries

Meeting the Demand for Computing Power

The collaboration between Samsung and Preferred Networks aims to address the growing demand for computing power in generative AI.
AI technologies, especially large language models, require immense computational resources.
Preferred Networks plans to develop AI accelerators using Samsung’s 2nm GAA process and I-Cube S packaging.
These solutions aim to meet high computational demands while maintaining energy efficiency.

Advancing AI Accelerator Technology

This partnership marks a significant achievement for Japanese companies in the field of large-sized heterogeneous integrated package technologies.

It also validates Samsung’s 2nm GAA process and advanced package technology as ideal solutions for next-generation AI accelerators.

The collaboration is expected to produce groundbreaking AI chiplet solutions, contributing to the advancement of AI accelerator technology and the broader semiconductor industry.

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Statements from Key Figures

Junichiro Makino, VP and CTO of Computing Architecture at Preferred Networks, expressed his excitement about the collaboration:

We are excited to lead in AI accelerator technology with Samsung Electronics’ 2nm GAA process. This solution will significantly support Preferred Networks’ ongoing efforts to build highly energy-efficient, high-performance computing hardware that meets the ever-growing computing demands from generative AI technologies, especially large language models.”

Taejoong Song, Corporate VP and Head of Foundry Business Development Team at Samsung Electronics, highlighted the importance of this order:

This order is pivotal as it validates Samsung’s 2nm GAA process technology and Advanced Package technology as an ideal solution for next-generation AI accelerators. We are committed to closely collaborating with our customers, ensuring that the high performance and low power characteristics of our products are fully realized.”

Future Prospects

Showcasing AI Chiplet Solutions

Building on this collaboration, Samsung and Preferred Networks plan to showcase innovative AI chiplet solutions for next-generation data centers and generative AI computing markets.

These solutions are expected to set new standards in AI accelerator technology, driving advancements in data center performance and AI computing capabilities.

Strengthening Samsung’s Market Position

Samsung’s commitment to advancing its foundry and packaging technologies will further strengthen its position in the global semiconductor market.

By partnering with leading AI companies like Preferred Networks, Samsung can continue to innovate and lead in the development of cutting-edge semiconductor solutions.

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Conclusion

The collaboration between Samsung Electronics and Preferred Networks represents a significant milestone in the semiconductor and AI industries.

By leveraging Samsung’s advanced 2nm GAA process and 2.5D packaging technology, the partnership aims to develop powerful, energy-efficient AI accelerators.

These chips are designed to meet the growing demands of generative AI. The collaboration advances AI accelerator technology significantly.

It also reinforces Samsung’s leadership in the semiconductor market. This sets the stage for future innovations and growth in AI computing and semiconductor technologies.

Kumar Priyadarshi
Kumar Priyadarshi

Kumar Priyadarshi is a prominent figure in the world of technology and semiconductors. With a deep passion for innovation and a keen understanding of the intricacies of the semiconductor industry, Kumar has established himself as a thought leader and expert in the field. He is the founder of Techovedas, India’s first semiconductor and AI tech media company, where he shares insights, analysis, and trends related to the semiconductor and AI industries.

Kumar Joined IISER Pune after qualifying IIT-JEE in 2012. In his 5th year, he travelled to Singapore for his master’s thesis which yielded a Research Paper in ACS Nano. Kumar Joined Global Foundries as a process Engineer in Singapore working at 40 nm Process node. He couldn’t find joy working in the fab and moved to India. Working as a scientist at IIT Bombay as Senior Scientist, Kumar Led the team which built India’s 1st Memory Chip with Semiconductor Lab (SCL)

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