Strategic Materials Conference 2025: A New Era of Semiconductor Innovation in San Jose

Join global semiconductor leaders at SMC 2025 in San Jose, June 23–25, for insights on materials innovation, AI-driven R&D, and U.S. policy impacts.

Introduction

The Strategic Materials Conference (SMC) 2025 will take place from June 23 to June 25, 2025, at the historic Hayes Mansion in San Jose, California. Organized by SEMI, this pivotal event is a major gathering for semiconductor professionals, showcasing groundbreaking materials innovation at the heart of Silicon Valley. With the semiconductor industry experiencing rapid growth, this year’s conference promises to be a turning point for materials science, reflecting the industry’s accelerating pace and the need for cross-sector collaboration.

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Event Overview

SMC 2025 is the premier forum for professionals from semiconductor companies, academia, and government to come together and share ideas about the future of materials innovation.

The conference’s shift from the traditional fall schedule to a summer gathering highlights the urgency of materials science in next-gen semiconductor development. Attendees will have the chance to engage in high-level discussions on how new materials will power advancements in fields like AI, data storage, and computing.

Key Details:

  • Dates: June 23–25, 2025
  • Location: Hayes Mansion, 200 Edenvale Avenue, San Jose, CA 95136, USA
  • Theme: “The New Era of Materials Innovation”

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Key Themes and Sessions at SMC 2025

SMC 2025’s agenda features cutting-edge topics that are critical to the semiconductor industry’s future. Here are some of the key themes to expect:

Market, Geopolitical, and Economic Trends

Speakers will track shifts in global chip manufacturing. Sessions will highlight how new government policies affect supply chains. Experts will explain how economic pressures reshape the industry’s direction.

Materials for Next-Generation Memory Devices

This session will focus on advanced memory for AI and data-driven systems. Presenters will showcase the latest breakthroughs. Talks will link these innovations to future chip performance.

Next-Generation Field-Effect Transistors (FETs)

Discussions will dive into materials needed for scaling FETs. Speakers will highlight integration hurdles in logic chip design. Engineers will share how they push Moore’s Law forward.

AI-Enabled Materials Innovation

AI is changing how companies discover and test new materials. Speakers will explain how algorithms speed up R&D. Sessions will show how AI boosts process efficiency and device output.

Advanced Packaging & Materials Integration

Packaging remains a major bottleneck in chip performance. This session will explore new solutions for advanced integration. Speakers will focus on thermal, signal, and scaling challenges.

SEMI PFAS Update

Presenters will share updates on PFAS rules in chipmaking. Talks will cover risks, replacements, and compliance strategies.

Experts will explain how fabs can adapt without performance loss.

Executive Panel: Impact of U.S. Policy on Semiconductor Innovation

Top executives will examine how U.S. policy affects global tech leadership. They will explore export controls, subsidies, and reshoring plans. The panel will offer insights into staying competitive.

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Notable Keynotes and Speakers

Strategic Materials Conference 2025 will feature talks from some of the most influential leaders in the semiconductor industry:

  • NVIDIA will share insights into how materials innovation is accelerating AI computing capabilities.
  • EMD Electronics will be represented by Dr. Surésh Rajaraman, EVP & Business Unit Head of Thin Films, who will present on how integrated material development and AI-driven approaches are transforming semiconductor R&D.
  • Industry executives from SEMI, TECHCET, and TSMC will also offer their perspectives on the latest market trends, regulatory shifts, and future materials needs.

Networking and Collaboration

In addition to sessions and keynotes, SMC 2025 offers excellent networking opportunities. Two exclusive receptions will allow attendees to engage with peers, discuss potential business collaborations, and explore new technological advancements.

Tabletop exhibits and sponsor showcases will provide hands-on access to the latest tools, services, and materials shaping the future of semiconductor manufacturing.

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Who Should Attend?

SMC 2025 is a must-attend event for a diverse group of professionals in the semiconductor industry, including:

  • CEOs, CTOs, and senior executives
  • Engineering and fab managers
  • Startup founders and entrepreneurs
  • Academic researchers and students
  • Financial analysts, market researchers, and consultants
  • Public policy experts and members of industry consortia

Why Attend SMC 2025?

With semiconductor technology driving the future of industries like AI, data storage, and computing, materials innovation is essential for staying competitive.

SMC 2025 in San Jose provides an unparalleled opportunity to gain actionable insights, build strategic partnerships, and explore new business opportunities in the world of semiconductor materials.

Whether you’re involved in R&D, corporate strategy, or navigating regulatory challenges, SMC 2025 is the place to be for shaping the future of semiconductor innovation.

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Conclusion

As the demand for advanced semiconductor technologies continues to grow, the Strategic Materials Conference 2025 will be a critical event for anyone involved in semiconductor innovation.

From the latest material advancements to discussions on policy and global market trends, SMC 2025 in San Jose will set the stage for the next generation of semiconductor breakthroughs.

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Kumar Priyadarshi
Kumar Priyadarshi

Kumar Joined IISER Pune after qualifying IIT-JEE in 2012. In his 5th year, he travelled to Singapore for his master’s thesis which yielded a Research Paper in ACS Nano. Kumar Joined Global Foundries as a process Engineer in Singapore working at 40 nm Process node. Working as a scientist at IIT Bombay as Senior Scientist, Kumar Led the team which built India’s 1st Memory Chip with Semiconductor Lab (SCL).

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