U.S. launches $3 billion Program for Advanced Semiconductor Packaging

By investing in domestic packaging capabilities and research and development, the program aims to create a thriving semiconductor ecosystem.

Introduction:

In a groundbreaking announcement, the Biden-Harris administration has unveiled a comprehensive vision to strengthen U.S. capabilities in advanced packaging, a crucial technology for manufacturing cutting-edge semiconductor.

Under Secretary of Commerce for Standards and Technology and National Institute of Standards and Technology (NIST) Director Laurie E. Locascio outlined the Department of Commerce CHIPS for America program’s initiatives, which include significant funding, manufacturing incentives, and research and development efforts.

The program aims to propel the U.S. into a leadership position in advanced semiconductor manufacturing and packaging, aligning with President Biden’s Investing in America agenda.

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The Vision for National Advanced Packaging Manufacturing Program (NAPMP):

The centerpiece of this initiative is the National Advanced Packaging Manufacturing Program (NAPMP), a pivotal component of the bipartisan CHIPS and Science Act.

The program, backed by approximately $3 billion in funding, will focus on driving U.S. leadership in advanced packaging.

Advanced packaging involves placing multiple chips with diverse functions in a densely interconnected two- or three-dimensional “package,” enabling the sector to achieve the increasingly smaller dimensions demanded by the most advanced semiconductors.

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Key Objectives of NAPMP:

Development of Advanced Packaging Ecosystem:

  • Establishing an advanced packaging piloting facility to validate and transition new technologies to U.S. manufacturers.
  • Implementing workforce training programs to ensure the capability of staff in handling new processes and tools.

Targeted Funding for Projects:

  • Materials and substrates: Investing in research and development related to materials and substrates.
  • Equipment, tools, and processes: Funding projects focused on enhancing manufacturing equipment and processes.
  • Power delivery and thermal management: Supporting innovations in power delivery and thermal management technologies.
  • Photonics and connectors: Promoting advancements in photonics and connectors for improved performance.
  • Chiplet ecosystem: Facilitating the development of a chiplet ecosystem for versatile applications.
  • Co-design for test, repair, security, interoperability, and reliability: Ensuring a holistic approach to semiconductor design.

Strategic Approach:

  • Emphasizing an interdisciplinary approach that brings together experts from various fields, including chip designers, materials scientists, process and mechanical engineers, and measurement scientists.

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Timeline and Funding Opportunities:

  • Anticipated announcement of the NAPMP’s first funding opportunity on materials and substrates in early 2024.
  • Additional announcements on investment areas, including a packaging piloting facility, to follow.

Impact and Significance of U.S. Semiconductor Packaging:

The CHIPS for America program, with its multifaceted approach, aims to address the limitations in both conventional and advanced packaging capacity in the United States. By investing in domestic packaging capabilities and research and development, the program aims to create a thriving semiconductor ecosystem. Secretary of Commerce Gina Raimondo emphasized the importance of these investments in achieving technological leadership and economic security for the nation.

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Conclusion:

The CHIPS for America program under the Biden-Harris administration is a crucial step in boosting semiconductor capabilities and revitalizing the U.S. semiconductor industry. The program focuses on fostering innovation, supporting research and development, and providing incentives for domestic manufacturing.

Its goal is to position US as a global leader in both semiconductor manufacturing and packaging within the next decade. This commitment is a significant move towards securing America’s technological and economic future.

The NAPMP, with its targeted funding and strategic objectives, is set to play a pivotal role in realizing this vision.

Kumar Priyadarshi
Kumar Priyadarshi

Kumar Joined IISER Pune after qualifying IIT-JEE in 2012. In his 5th year, he travelled to Singapore for his master’s thesis which yielded a Research Paper in ACS Nano. Kumar Joined Global Foundries as a process Engineer in Singapore working at 40 nm Process node. Working as a scientist at IIT Bombay as Senior Scientist, Kumar Led the team which built India’s 1st Memory Chip with Semiconductor Lab (SCL).

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