Introduction
United Microelectronics Corp. (UMC) has embarked on an exciting journey towards revolutionizing semiconductor innovation with its W2W (wafer-to-wafer) 3D IC project.
Collaborating with key partners like Winbond, Faraday, ASE, and Cadence Design Systems Inc., this project aims to empower customers with cutting-edge solutions for efficiently integrating memory and processors using silicon stacking technology.
W2W 3D IC project is an ambitious undertaking that seeks to leverage 3D IC technology to address the specific requirements of edge AI applications.
It involves multiple partners with complementary expertise, all working together to create an integrated solution that will benefit the semiconductor industry and advance the development of efficient, high-performance computing solutions at the edge.
The primary focus is on meeting the burgeoning demand for high-performance computing at the device level, as artificial intelligence extends its reach from the cloud to the edge.
In this blog post, we’ll dive deep into the significance of the W2W 3D IC project and the contributions of each partner.
The Rise of Edge AI
Artificial intelligence has been a driving force behind technological advancements in recent years. As AI applications expand beyond data centers and into the edge, a new set of challenges and requirements emerge.
Edge AI applications like home and industrial IoT, security, and smart infrastructure require powerful computing, customizable memory, and energy-efficient operation.
This is where the W2W 3D IC project comes into play, offering a comprehensive solution to address these challenges.
The project’s goals include addressing hurdles in heterogeneous integration, such as aligning wafer stacking rules between logic and memory fabs, developing efficient vertical wafer integration workflows, and ensuring the reliability of packaging and testing processes.
Read More: Explained: What the hell is 3D IC packaging?
What is UMC W2W 3D IC Project?
Here’s a breakdown of what the W2W 3D IC project entails:
3D IC Technology: 3D IC technology involves stacking multiple integrated circuits on top of each other, creating a three-dimensional structure.
This method enables efficient and compact integration of components, including processors and memory, into a single package.
Wafer-to-Wafer Integration: W2W, or wafer-to-wafer integration, is a key aspect of the project.
It refers to the process of bonding whole wafers together, enhancing the integration of components and improving overall performance.
Edge AI Focus: The project primarily targets edge AI applications, which are AI implementations at or near the point of data generation or use.
These applications demand specialized solutions due to requirements like mid-to-high range computing power, customizable memory modules, and low power consumption.
Collaboration: UMC collaborates with several partner companies, each contributing their expertise to address various challenges related to 3D IC technology.
The partners include Winbond, Faraday, ASE (Advanced Semiconductor Engineering), and Cadence Design Systems Inc.
End-to-End Solution: The project aims to provide an end-to-end solution for integrating memory and processors using silicon stacking technology.
Designed for edge AI applications, this solution provides an integrated approach to tackle intricate semiconductor design and manufacturing challenges.
Read More: China Makes World’s Most Advanced 3D NAND memory chip Despite US Sanctions
UMC 3D IC Project- Partner Contributions
The success of the W2W 3D IC project lies in the collective expertise and capabilities of its partner organizations. Let’s take a closer look at what each partner brings to the table:
| Partner | Role in the Project | Location |
|---|---|---|
| United Microelectronics Corp. (UMC) | Provides CMOS wafer manufacturing and wafer-to-wafer hybrid bonding technology. | Taiwan |
| Winbond | Introduces Customized Ultra-Bandwidth Elements (CUBE) architecture for edge AI devices and memory solutions. | Taiwan |
| Faraday | Offers turnkey services for 3D advanced packaging, memory IP, and ASIC chiplets design services. | Taiwan |
| ASE (Advanced Semiconductor Engineering) | Provides die sawing, packaging, and testing services. | Taiwan |
| Cadence Design Systems Inc. | Enables wafer-to-wafer design flow, extraction with through-silicon vias (TSVs), and sign-off certification. | United States |
Overview of each partner’s role in the project and their respective locations.
UMC:
UMC contributes its CMOS wafer manufacturing and wafer-to-wafer hybrid bonding technology. This technology is at the heart of the project, enabling the stacking of wafers with precision.
G.C. Hung, Vice President of the Result Delivery Office and Research Development at UMC, emphasizes the project’s commitment to pushing the boundaries of semiconductor innovation and contributing robust CMOS wafer manufacturing capabilities.
Winbond:
Winbond introduces the Customized Ultra-Bandwidth Elements (CUBE) architecture, designed for powerful edge AI devices. The CUBE architecture allows for seamless deployment across platforms and interfaces, empowering customers to integrate custom DRAM into their 3D packages.
Hsiang-Yun Fan, Winbond’s DRAM Vice President, emphasizes the significance of increased memory bandwidth in managing higher data workloads on edge devices.
Faraday:
Faraday provides comprehensive turnkey services for 3D advanced packaging, memory IP, and ASIC chiplets design services. Their involvement empowers customers to harness the potential of chip integration.
Flash Lin, COO of Faraday, underscores the significance of this project in enabling customers to make the most of chip integration opportunities.
ASE:
ASE plays a vital role in the project by providing die sawing, packaging, and testing services. Their commitment to collaborating with industry partners aims to enhance semiconductor design and manufacturing processes.
Dr. C.P. Hung, Vice President of R&D at ASE, stresses the importance of collectively improving customer time-to-market and sustaining profitable growth in the AI era.
Cadence Design Systems Inc.:
Cadence is the only EDA partner in this project, responsible for enabling 3D IC designs with the Cadence Integrity 3D-IC Platform.
Don Chan, Vice President, R&D in the Digital & Signoff Group at Cadence, emphasizes their commitment to accelerating time-to-market designs for customers, considering the growing relevance of 3D IC designs in edge AI applications.
Read More: How China Circumvented US Restrictions to Unveil 120 Layer NAND Flash
Conclusion
The W2W 3D IC project, led by UMC and partners, marks a major stride in semiconductor innovation. It’s poised to provide efficient solutions for memory and processor integration, meeting the evolving demands of edge AI applications. As it advances toward the 2024 completion, the project will conquer issues like wafer stacking alignment, design flow, and testing.
