Why Is ASML Pushing to Delay the EU AI Act by Two Years?

ASML joins over 45 European tech leaders in urging the EU to delay its AI Act by two years, citing unclear rules, high compliance costs, and risks to Europe’s competitiveness in AI and chipmaking.

Introduction

As Europe leads the charge with the world’s first comprehensive AI regulation, a growing number of tech and industrial giants are sounding the alarm. Among them is ASML, the Dutch chipmaking equipment powerhouse, which has joined over 45 European CEOs in urging the European Commission (EC) to delay the implementation of the EU AI Act by two years.

But why would a company like ASML, which doesn’t build AI models, be concerned with AI regulations? The answer lies in the critical role it plays in powering the AI ecosystem—and the potential risks these regulations pose to Europe’s competitiveness.

The EU AI Act: A Quick Background

Passed in 2024 and set to be fully enforced by 2027, the EU AI Act categorizes AI systems based on risk:

  • Unacceptable risk (e.g., social scoring) – banned.
  • High risk (e.g., biometric ID, critical infrastructure) – strict rules.
  • Limited risk – transparency requirements.
  • Minimal risk – no additional regulation.

Key parts of the Act—including those governing general-purpose AI (GPAI) like ChatGPT—are set to come into effect as early as August 2, 2025.

ASML’s Concern: Why a Chipmaking Tool Company Cares

ASML doesn’t create AI models or software, but it supplies the most advanced lithography machines—like EUV (Extreme Ultraviolet) and High-NA EUV systems—used by leading chip foundries such as TSMC, Intel, and Samsung. These foundries manufacture AI chips designed by NVIDIA, AMD, and others that power the global AI boom.

With the AI revolution ramping up, ASML stands to benefit from massive capex expansions. For example:

Company2025 Capex (Est.)
Meta$64–72 billion
OpenAI/Oracle/SoftBank (Stargate project)$100 billion (planned)

If AI regulations are rushed or poorly implemented, they could delay chip development, create legal uncertainty, and reduce investments in the AI infrastructure that relies on ASML’s tools.

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Why the Delay? The CEOs’ Key Arguments

In a joint letter to EU leadership, ASML and companies like PhKey Concerns in Brief

Tight Timeline: Staged enforcement from August 2025 to August 2027—but the voluntary Code of Practice is still incomplete.

Lack of Clarity: No detailed guidance yet on what compliance entails, especially for general-purpose AI.

High Costs: Documentation, audits, and legal work for “high-risk” systems hit SMEs hardest.

Investment Flight: Vague or strict rules risk driving AI projects to the U.S. or Asia.

Supply-Chain Risk: Foundries may delay costly AI-chip fabs, cutting demand for ASML’s tools.

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What Does the EU Say?

The EU Commission maintains that the AI Act is essential to ensure trust, safety, and innovation in AI.

Officials argue that delaying the rollout risks losing regulatory momentum. However, the Commission has promised to provide additional guidance and support tools before enforcement begins.

So far, no official delay has been announced, but Brussels is under growing pressure from both industry leaders and some EU member states, such as Sweden, to reconsider the timeline.

The Bigger Picture

This clash reflects a broader dilemma:
How can Europe regulate AI responsibly without choking its own tech sector?

On one side, strong AI rules may protect users and enforce transparency. On the other, moving too fast—especially without clear rules—could turn Europe into a regulatory island and discourage AI investments.

ASML’s position underscores how interconnected AI innovation is with the semiconductor industry. Even companies that don’t build AI software are deeply impacted by the rules shaping its future.

Conclusion

By giving companies space to adapt, the EU can strike a balance between responsible oversight and global competitiveness—and ensure that Europe doesn’t miss out on the next big wave of AI and chip innovation.

For expert guidance on semiconductor challenges, from design to manufacturing, @Techovedas is your trusted partner. Contact us today for tailored technical solutions and support!

Kumar Priyadarshi
Kumar Priyadarshi

Kumar Joined IISER Pune after qualifying IIT-JEE in 2012. In his 5th year, he travelled to Singapore for his master’s thesis which yielded a Research Paper in ACS Nano. Kumar Joined Global Foundries as a process Engineer in Singapore working at 40 nm Process node. Working as a scientist at IIT Bombay as Senior Scientist, Kumar Led the team which built India’s 1st Memory Chip with Semiconductor Lab (SCL).

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