How does Intel Plan to Leapfrog Competition in 2024

Introduction

In the highly competitive realm of semiconductor manufacturing, Intel is gearing up for a transformative comeback with its Arrow Lake processor. Faced with challenges in recent years, the tech giant is taking a bold and calculated risk by introducing two groundbreaking Intel Leapfrog technologies simultaneously – RibbonFET and PowerVia.

Let’s delve into the details of this ambitious move, exploring the technical innovations, potential benefits, and the calculated risks associated with Intel’s quest to reclaim technological supremacy.

Intel’s Uphill Battle and Determination

For the past five years, Intel has trailed behind competitors like Taiwan Semiconductor Manufacturing Co. (TSMC) and Samsung in advanced chip manufacturing. Chris Auth, Intel’s Vice President of Technology Development, acknowledges Intel’s historical leadership in transistor architecture changes but highlights the checkered past of its chip production.

Delays in delivering key processors, such as the 10-nanometer CPU in 2018 and the 7-nanometer node in 2020, prompted Intel to reevaluate its strategies.

RibbonFET: Revolutionizing Transistor Technology

The first pillar of Intel’s technological leap is RibbonFET, a nanosheet transistor set to replace the existing FinFET technology. Chris Auth emphasizes Intel’s historical leadership in making key changes to transistor architecture, and RibbonFET represents the next evolution in this journey.

FinFET transistors, which have been integral to CPUs, provided low power requirements and greater logic circuit density by wrapping the transistor’s gate around its channel region on three sides. However, as these FinFETs scaled down in size, they approached the limit of their gates’ ability to control current.

RibbonFET transistors, intel’s version of the GAA nanosheet transistors, provide enhanced control by completely surrounding the channel region with gates. The novel device is part of Intel’s upcoming 20A processing node, where the “A” refers to the angstrom, a unit of length. Intel anticipates a significant improvement of up to 15 percent in energy efficiency with RibbonFET. The introduction of this advanced transistor technology is poised to redefine the capabilities of Intel’s processors.

PowerVia: Flipping the Script on Power Delivery

The second pivotal technology is PowerVia, a revolutionary power-delivery system that decouples power from processing. Historically, all interconnects have been on the front side of the wafer. However, PowerVia marks a paradigm shift by utilizing the surface on the other side of the wafer for power delivery. Auth notes that this is the first-time manufacturers will use the back side of the wafer for interconnects, a concept generally referred to as back-side power.

PowerVia addresses the inherent differences in optimization between power and signal lines. While power lines perform best with low-resistance, high-gauge wires, signal lines require more space between them to minimize interference.

It’s like having dedicated lanes for power and signals on a two-way street, ensuring efficient and reliable performance. This innovative approach is part of Intel’s strategy to enhance chip efficiency and performance in their upcoming Arrow Lake processor.

Intel’s Calculated Risk: Pairing Two Technologies

Intel’s decision to introduce RibbonFET and PowerVia simultaneously is a calculated risk. Typically, projects of this nature operate on a decade-long timeline. However, Intel, recognizing the advancements made by competitors, decided to pair these technologies about five years ago, as Auth mentions, “to get ahead of its competitors and avoid waiting for the next node to introduce one or the other.”

Dan Hutcheson, Vice Chair of TechInsights, acknowledges the risk Intel is taking by implementing two major technology changes at once. He points out that such a move has often been a recipe for disaster in the past. Intel’s innovation needs to be accompanied by reliable production to attract and maintain customers, especially as the company shifts towards a semiconductor foundry model, separating manufacturing and product groups.

Learning from Mistakes: Testing the Waters with PowerVia

Intel is well aware of the risks associated with major technology changes, given past setbacks with the 10-nanometer node. To mitigate potential issues, Intel added an internal node pairing PowerVia with the current generation of FinFET. Test results presented in June 2023 showed a 6 percent performance gain with PowerVia alone.

This internal stepping-stone allowed Intel to test back-side power delivery and address challenges in both process and design. Challenges include aligning and linking the front and back sides of the chip with nanometer-sized vertical connectors called through-silicon vias, which are 1/500 the size of previous connectors. Maintaining flat surfaces for chip patterning when working with both sides of the silicon wafer presents another precision challenge.

Conclusion: A Pivotal Moment for Intel

Intel’s Arrow Lake processor marks a pivotal moment in the company’s history. By introducing RibbonFET and PowerVia simultaneously, Intel is taking calculated risks to regain its technological edge. As the semiconductor industry evolves, Intel’s innovative approach could redefine chip manufacturing, setting new standards for efficiency and performance. The success of these technologies could propel Intel back to the forefront, and the industry watches with anticipation as the company navigates this crucial juncture. There’s a lot riding on this, as Dan Hutcheson aptly puts it, “There’s a lot riding on this.”