TSMC N3P To Outperform Intel 18A, Derailing Intel’s Foundry Leadership Plan by 2025

TSMC CEO : " We will outperform Intel's 18A with our N3P already, our internal assessment shows our N3P demonstrated comparable PPA to 18A competitors' technology but with an earlier time to market and much better cost. Our 2nm technology without backside power is more advanced than both N3P and 18A."

Introduction

The semiconductor industry is witnessing an intense battle of innovation and technological advancement between two major players: Taiwan Semiconductor Manufacturing Company (TSMC) and Intel. TSMC, under the leadership of its CEO, has recently claimed significant advantages in terms of Performance, Power, and Area (PPA), time to market, and cost efficiency with its upcoming N3P process technology. Furthermore, TSMC has announced its 2nm process technology, which is poised to redefine high-performance computing and other demanding applications. In this blog post, we’ll explore these claims and their implications for the semiconductor landscape.

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TSMC’s N3P vs. Intel’s 18A: The Battle of the Titans

TSMC’s N3P process technology has been making headlines, with the company asserting its superiority over Intel’s 18A process technology. Let’s delve into what this means:

PPA Dominance: Performance, Power, and Area are paramount in semiconductor manufacturing. TSMC claims that its N3P process will outperform Intel’s 18A across all these fronts. Enhanced performance is crucial for high-end smartphones and mobile devices, where users demand faster and more efficient processors. TSMC’s technology promises to meet this demand while offering better power efficiency and smaller chip sizes, reducing the overall footprint of devices.

Cost Efficiency: Lower production costs are a significant factor in choosing a semiconductor manufacturing process. TSMC claims that its N3P process will offer cost advantages over Intel’s 18A. This can reduce the manufacturing expenses for device makers, potentially leading to more competitive pricing for consumers.

Image Credits: TSMC

Read More: Intel Foundry, Even if Successful, Will Be Overshadowed by TSMC: Chang

What is N3P Process?

The N3P process is a 3nm semiconductor process technology developed by TSMC. It is an enhancement of the N3E process, and it offers improved performance, reduced power consumption, and increased transistor density.

N3P is expected to be used in high-end smartphones and other mobile devices in 2024. It is also expected to be used in some high-performance computing (HPC) and other demanding applications.

Here are some of the key benefits of the N3P process:

  • 5% higher performance than N3E
  • 5-10% lower power consumption than N3E
  • 1.04x higher transistor density than N3E
  • Compatibility with N3E design rules

TSMC claims that N3P will be the most advanced and most cost-effective 3nm process technology on the market when it launches.

“Our internal assessment shows our N3P demonstrated comparable PPA to 18A competitors’ technology but with an earlier time to market and much better cost. Our 2-nanometer technology without backside power is more advanced than both N3P and 18A.”

~TSMC CEO

Read More: How TSMC is a Winner in Intel’s Recent Announcement

TSMC’s 2nm Process: The Next Frontier

While the N3P process is set to make waves in the mobile device market, TSMC is not resting on its laurels. The company is gearing up for the introduction of its groundbreaking 2nm process technology, which holds immense promise for high-performance computing and other resource-intensive applications:

Advanced Technology: TSMC asserts that its 2nm process technology is more advanced than both N3P and Intel’s 18A. This technological leap could reshape the landscape of high-performance computing, artificial intelligence, and other demanding applications. Smaller transistors and improved power efficiency can unleash unprecedented computing power.

No Backside Power Delivery Needed: It’s noteworthy that TSMC’s 2nm process is touted as more advanced even without the use of backside power delivery, a technology that Intel has been working on for its 18A process. This showcases TSMC’s prowess in optimizing chip design and manufacturing processes.

Read More: Intel to Start Mass EUV Production in Ireland; 2 Out of 5 nodes achieved

The Implications for the Semiconductor Industry

The fierce competition between TSMC and Intel is driving the semiconductor industry to new heights of innovation. Both companies are investing heavily in research and development to gain an edge in an increasingly competitive market. Here are some key takeaways:

Innovation Acceleration: The rivalry between TSMC and Intel is accelerating technological advancements in semiconductor manufacturing. This competition is a boon for the industry, as it pushes the boundaries of what is possible, resulting in more powerful and efficient chips.

Consumer Benefits: Ultimately, it is the consumers who stand to gain the most from this technological arms race. Faster, more efficient, and cost-effective chips will power the next generation of devices, from smartphones to high-performance computing solutions, enabling new possibilities and enhancing user experiences.

Read More: How TSMC is a Winner in Intel’s Recent Announcement

Intel Will Reclaim Foundry Leadership from TSMC by 2025: CEO

To achieve this goal, Intel is steadfastly following its manufacturing roadmap, which includes delivering five nodes in four years.  Gelsinger announced that after Meteor Lake (expected to launch soon).

Intel will be ramping up its Intel 3 process (5 nm). Even more exciting is Intel’s 18A node (1.8 nm), which has already been successfully taped out and is on track for 2025. 

TSMC Announcement creates a lot of uncertainty Pat’s vision for Intel foundry.

Conclusion

TSMC’s claims about its N3P and 2nm process technologies present a promising future for the semiconductor industry. If these assertions hold true, TSMC will maintain its lead over Intel, driving innovation and benefiting consumers worldwide. As technology enthusiasts, we can eagerly look forward to the next wave of high-performance devices and applications that these cutting-edge semiconductor technologies will power.

Kumar Priyadarshi
Kumar Priyadarshi

Kumar Joined IISER Pune after qualifying IIT-JEE in 2012. In his 5th year, he travelled to Singapore for his master’s thesis which yielded a Research Paper in ACS Nano. Kumar Joined Global Foundries as a process Engineer in Singapore working at 40 nm Process node. Working as a scientist at IIT Bombay as Senior Scientist, Kumar Led the team which built India’s 1st Memory Chip with Semiconductor Lab (SCL).

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