DFT Engineer:
If you are a DFT engineer with expertise in GPU technologies and Engineering (architecture, IP, SoC, software) and are passionate about defining the future of graphics computing and AI, we have opportunities for you.
The Client Graphics, GPU IP, and AI (CGAI) group is responsible for delivering industry-leading GPU IP (3D, media, display, compute) to all our business units and their market segments. It is including for the client, high-performance computing and AI, and edge computing. CGAI is also responsible for the development of specialized IP for the NPU (neural processing unit) and AI model deployment across our hardware for the AI PC. Additionally, CGAI encompasses all aspects of client graphics engineering and manages the Arc graphics portfolio and business.
| Company Role | World’s leading semiconductor IP company |
| Location | Bangalore |
| Experience | 10to 20 years |
| Designation | Principal DFT Engineer |
CGAI
CGAI is part of the Client Computing Group (CCG), the business unit responsible for the full portfolio of client technologies. Its platforms designed to enable exceptional personal computing experiences.
The DFT Principle Engineer’s responsibilities include (but are not limited to):
Lead the product DFT Architecture for the future ARC discrete graphics SoC
Drive DFT technical readiness (TR) and define DFT strategy to meet our Manufacturing requirements
Provide technical mentorship and support to the DFT engineering teams. Work with the team to define DFT quality control/process for SoC execution predictability and high quality DFT delivery to achieve the “first-time-right” goals
Improve overall product cost by analyzing product requirement to balance DFT/Manufacturing requirements vs products’ PPA and cost
Support critical post-Si debug and yield/Vmin analysis as required
Minimum Qualifications for DFT Engineer: :
Bachelors Degree in Electrical/Computer Engineering or related STEM degree plus 10+ years of industry experience in the following:
* Expert in industry standard DFT (TAP/JTAG, MBIST, SCAN/ATPG)
* Experienced in DFT product architecture/micro-architecture with end-to-end DFT design. Verification flow knowledge from DFT technical readiness (TR) to product PRQ support
* Experienced with EDA tools such as ATPG tools, Siemens Tessent shell, VCS simulation and/or debug tools, Prime time and DFTC and/or similar tools
*Understand the “best known method” to integrate IP from internal and/or external vendors, such as IO PHY and PLL
* Experienced in DFT pattern generation flow, post-Si debug and yield analysis
* Strong leadership and mentorship and be able to lead cross-site initiatives/WG with key stakeholders and customers
Preferred Qualifications:
* Familiar with GPU, Media and Display architecture and design flow
*Familiar with SoC Architecture and design flow
Business group:
The Client Computing Group (CCG) is responsible for driving business strategy and product development for our PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones.
Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people’s potential – allowing each person to use our products to focus, create and connect in ways that matter most to them.
As the largest business unit, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products.
As a result, we are able to fuel innovation, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth.
