Manager – DEG Layout – DRAM Engineering Group at World Leader in Innovative Memory Solutions 

We are searching for an IC Layout Manager in our DRAM Engineering Group in India. 

Introduction:

Our vision is to transform how the world uses information to enrich life for all.  We are world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. For more than 40 years, we have redefined innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life.  We are searching for an IC Layout Manager in our DRAM Engineering Group in India. 

As an IC Layout Manager, you will work with an exceptionally talented, passionate core team based in India, lead the team to design IC layout, collaborating with peer teams crossing Micron global footprint, to meet scheduled milestones in a multiple projects-based environment. 

Company RoleWorld leader in innovative memory solutions 
Location Hyderabad 
Experience 8 to 20 years  
Designation  Manager – DEG Layout – DRAM Engineering Group 

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Responsibilities 

  • Provide leadership in building and growing a Custom layout team from the ground up to support our global DRAM layout requirement. 
  • Provide leadership in developing Analog and custom layout to meet schedule and milestone. 
  • Provide leadership in training the team’s technical skills and cultural healthiness. 
  • Effectively communicating with engineering teams across multiple countries to assure the success of the layout project. 
  • Organize, prioritize, and manage logistics on tasks and resource allocations for multiple projects. 
  • Manage performance and development of team members. 
  • Managing hiring and retention. 
  • As a critical member of the core DRAM leadership team in India, contribute to the overall success of our DRAM India operation. 

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Qualification/Requirements 

  • BE or MTech in Electronic/VLSI Engineering. 
  • 8 + year experience in analog/custom layout in advanced CMOS process. 
  • Minimum 2+ years of people management experience. 
  • Expertise in Cadence VLE/VXL and Mentor Graphic Calibre DRC/LVS is a must. 
  • Must have strong skills in layout and floor planning skills and manual routing. 
  • Strong ability to build, and continuously develop a premier analog/mixed-signal layout team. 
  • Experienced in managing multiple Custom IC layout projects. 
  • Highly motivated with passion, detail oriented, systematic and methodical approach in IC layout design. 
  • The ability to work and communicate effectively in a team and to be able to multi-task effectively in a fast-paced working environment. 
  • Excellent verbal and written communication skills required. 
  • Independent with strong analytical skills, creative thinking and self-motivated. 
  • Capable of working in a cross functional, multi-site team environment in multiple time zones. 
  • Previous work experience in DRAM/NAND layout design is desirable, however not mandatory. 

Take a Look at other open positions here

As a world leader in the semiconductor industry, we are dedicated to your personal wellbeing and professional growth. Our benefits are designed to help you stay well, provide peace of mind and help you prepare for the future.  We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget.  We also provide benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave.  Additionally, our benefits include a robust paid time-off program and paid holidays. 

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Conclusion

We are proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws. 

Apply here

Kumar Priyadarshi
Kumar Priyadarshi

Kumar Priyadarshi is a prominent figure in the world of technology and semiconductors. With a deep passion for innovation and a keen understanding of the intricacies of the semiconductor industry, Kumar has established himself as a thought leader and expert in the field. He is the founder of Techovedas, India’s first semiconductor and AI tech media company, where he shares insights, analysis, and trends related to the semiconductor and AI industries.

Kumar Joined IISER Pune after qualifying IIT-JEE in 2012. In his 5th year, he travelled to Singapore for his master’s thesis which yielded a Research Paper in ACS Nano. Kumar Joined Global Foundries as a process Engineer in Singapore working at 40 nm Process node. He couldn’t find joy working in the fab and moved to India. Working as a scientist at IIT Bombay as Senior Scientist, Kumar Led the team which built India’s 1st Memory Chip with Semiconductor Lab (SCL)

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