TSMC 2nm Trial Production To Begin in 2024; HVM by 2025

Introduction

As TSMC accelerates its pace with the 3nm process, discussions intensify around the company’s future endeavours, particularly its 2nm and 1.4nm chips processes.

While a recent report from Digitimes unveils TSMC’s projected timelines for these highly-anticipated nodes, it’s important to approach this information with caution due to potential unforeseen factors like natural disasters and geopolitical instability.

Nevertheless, the potential shift of some production to TSMC’s Arizona facility and the technological advancements anticipated with the 2nm transition mark unprecedented developments in the semiconductor industry.

The Reports

As per the latest report from Digitimes, TSMC is reportedly aiming to commence trial production of 2nm chips later this year, scaling up to high-volume production by 2025.

TSMC is building fabs specifically designed for 2nm chip production using a process called Gate-all-around (GAA) transistors. Apple is expected to be the first customer to use these chips, likely in their iPhone 17 lineup.

These chips are expected to deliver significant performance improvements (10-15% higher) or lower power consumption (20-30% lower) compared to the current generation of 3nm chips.

Production using 1.4nm technology might start by 2027, but this timeline could change. There is no official information from TSMC about 1.4nm chips.

However, considering the ongoing research and development in semiconductor technology, it’s reasonable to expect them to be working on future generations beyond 2nm. 2027 is a possible timeframe based on industry speculations, but it should be taken with a grain of salt.

TSMC Journey from 7 nm to 2 nm

TSMC’s journey from 7nm to 2nm has been one of continuous miniaturization and performance improvement. Here’s a breakdown of the key milestones:

7nm (N7): Introduced in 2018, it was the first commercially viable 7nm process technology. Compared to 10nm, it offered significant benefits like:
- Increased transistor density (around 1.8x)
- Improved performance (around 20%)
- Reduced power consumption (around 40%) This made it ideal for high-performance computing and mobile processors.

5nm (N5): Launched in 2020, it further refined the 7nm process with:
- Enhanced performance and power efficiency compared to N7
- Variants like N5P and N4 for specific needs (power, performance, density) This became the go-to choice for flagship smartphones and powerful laptops.

3nm (N3): Production began in 2022, offering:
- Even greater transistor density and performance gains over 5nm
- Continued focus on power efficiency This is currently the most advanced process technology in mass production.

2nm (planned): Expected for risk production in late 2024 and mass production in 2025, it will be a significant leap with:
- A shift from FinFET transistors to GAAFET (Gate-all-around) for improved performance and power efficiency
- Potential performance improvements of 10-15% or power reductions of 20-30% compared to 3nm

It’s important to note that the numbers (7nm, 5nm, etc.) are marketing terms and don’t directly represent the physical size of transistors. They indicate a new generation of process technology with advancements in miniaturization and overall chip performance.

Read mor e How TSMC helps Apple to build iPhone? – techovedas

TSMC to Decentralize N2 node manufacturing

Furthermore, potential geopolitical tensions have prompted TSMC to allegedly consider relocating some of its advanced nodes to its US operations, reflecting a strategic shift in its global manufacturing footprint.

The potential allocation of 2nm chip production to TSMC’s Arizona facility (by 2027) represents a departure from the company’s traditional concentration of advanced node production in Taiwan.

It was previously reported that TSMC would keep 2nm production in Taiwan, but perhaps it’s changed its mind about that strategy.

This move is expected to diversify TSMC’s production capabilities and mitigate risks associated with centralizing manufacturing in a single geographical location.

TSMC’s Roadmap

Additionally, TSMC’s transition to 2nm signifies a monumental leap as the company moves away from FinFET to gate-all-around (GAA) nanosheet transistors, signaling a significant evolution in semiconductor technology.

The company will reportedly offer its first 2nm wafers—called just N2—to customers in 2025, and then offer an enhanced version in 2026 named N2P.

It previously stated it would not be adding backside power delivery until N2P comes out, which would put it at least two years behind Intel, which is expected to introduce that feature in this year’s Intel 20A process for Arrow Lake.

TSMC will add a third variant of 2nm after N2P named N2X, which will be for high-performance computing applications.

In general, these chips are power hungry and need the ability to increase their clocks at peak demands.

This means that they have to support high voltages and currents. The N2X is designed to deliver maximum performance and support for higher voltages.

Conclusion

Intel and TSMC are in a race to develop the smallest and most advanced computer chips.

Additionally, Intel is planning to make a 2nm chip by 2024, which might make TSMC speed up its own 2nm chip production.

Intel is also working on a new technology called High-NA lithography for even smaller 1.4nm chips by 2026.

On the other hand, TSMC is sticking with EUV technology right now. The competition between these two companies is going to get very interesting in late 2024 and 2025.